About Amkor Technology

Amkor Technology, Inc. (Amkor) provides outsourced semiconductor packaging and test services. Amkor is a pioneer in the outsourcing of semiconductor packaging and test services, and has built a leading position by designing and developing innovative packaging and test technologies focused on advanced packaging solutions in high growth markets, including artificial intelligence; building expertise in high-volume manufacturing processes and developing a reputation for high quality and solid execution; cultivating long-standing relationships with its customers, which include many of the world’s leading semiconductor companies; collaborating with customers, foundries, original equipment manufacturers (OEMs) and equipment and material suppliers; focusing on strategic end markets that offer solid growth potential; providing a geographically diverse operating base with manufacturing facilities in multiple countries across Asia and in Europe; and developing a structure through disciplined capital investment. The company’s packaging and test services are designed to meet application and chip-specific requirements, including the required type of interconnect technology; size; thickness; and electrical, mechanical and thermal performance. The company provides turnkey packaging and test services, including semiconductor wafer bump, wafer probe, wafer back-grind, package design, packaging, system-level and final test and drop shipment services. The company’s customers use it for one or more of these services. The company provides its services to integrated device manufacturers (IDMs), fabless semiconductor companies, OEMs and contract foundries. IDMs generally design, manufacture, package and test semiconductors in their own facilities. By offering a broad package portfolio, Amkor allows IDMs to outsource packaging and test services and focus their investments on core competencies, such as silicon fabrication. Strategy Amkor is a leader in advanced packaging technology in the outsourced assembly and test market. Growth in the semiconductor industry is being driven primarily by advanced packaging within the industry secular growth markets of 5G, automotive, high-performance computing (HPC) and IoT. Amkor is well positioned in each of these end markets. Within its communications end market, the company has a strong position across multiple device functionalities within premium and high tier smartphones. The company is collaborating with industry leaders as smartphones transition to 5G and drive semiconductor growth through the adoption of new wireless standards, integration of a broad range of applications, enhanced features, and higher performance requirements to support increased data processing. The trend to greater functionality drives miniaturization and cost reduction enabled by advanced packaging. Increasing semiconductor content in automobiles is driving increased demand for advanced packaging to enable the proliferation of safety features, such as advanced driver assistance systems (ADAS) and radar and digital cockpit features such as infotainment displays and telematics. Increasing battery voltage, higher voltage power converters, onboard chargers, automotive inverter components and microcontrollers also require innovative power packaging solutions. Increased data traffic requiring higher networking speed and storage, as well as computing power increases in HPC, artificial intelligence, data centers, cloud computing, PCs and laptops, are driving demand for more semiconductors and advanced packaging in the computing end market. The IoT wearables within the company’s consumer end market are evolving in multiple applications, such as hearables, watches, health trackers and augmented reality and virtual reality devices. Integration of multiple functions into small form factors, such as processors, sensors and connectivity devices, depends on innovation in advanced packaging. The key elements of the company’s strategy are to leverage its leadership in services for advanced technologies; optimize utilization of existing assets; selectively grow its scale and scope through strategic investments; geographically diversified manufacturing base; and long-standing relationships and collaboration with prominent semiconductor companies. Packaging and Test Services The packaging and test services the company provides occur subsequent to wafer fabrication, and the wafers that it receives from customers are generally consigned to it. Advanced Products and Mainstream Products The company offers a broad range of advanced and mainstream packaging and test services to its customers. The company refers to its flip chip, wafer-level processing and related test services as Advanced Products and to its wirebond packaging, power device packaging and related test services as Mainstream Products. Advanced Products The company’s Advanced Products include flip chip chip scale packages (FC CSP), wafer-level packages and flip chip ball grid array (FCBGA) packages. These package families use flip chip interconnect technology so that the die can be connected to a substrate package carrier or, in the case of wafer-level chip scale packages, directly to a printed circuit board. FC CSP Products: FC CSP packages are small form factor packages where the substrate size is not much larger than the die itself. FC CSP can be a single die or multi die format. The size advantage provided by CSP technologies has made FC CSP an attractive choice for a wide variety of applications that require very small form factors, such as smartphones, tablets and other mobile consumer electronic devices. Flip chip stacked chip scale packages (FC SCSP) stack a second die on top of the original flip-chip die. The top die is typically a memory device, and wirebond interconnects are used to attach the top die to the substrate. FC SCSP is frequently used to stack memory on top of digital baseband and applications processors for use in mobile devices. The company continues to drive thinner package solutions for its Package on Package (PoP) technology through the development of ultra-thin substrates and enhancing its pre-stacking and thin die handling capabilities. The company developed fine pitch copper pillar flip chip interconnect technology, which creates interconnections at finer pitches using a plating process to reduce the number of substrate layers to facilitate very thin packages. This innovative solution is also an enabling technology for package stacking with TSVs. FCBGA Products: FCBGA packages are large form factor substrate-based packages which are used where processing power and speed are a higher priority than a small form factor. The company’s FCBGA packages are assembled using state-of-the-art substrates. Utilizing multiple high density routing layers, laser drilled vias, and ultra-fine line and space metallization, FCBGA substrates have the highest routing density available. The variety of FCBGA package options, from large single die to multi-chip packages with memory, allows package selection to be tailored to the specific thermal needs of the end product. The company offers FCBGA packaging in a variety of product formats to fit a wide range of end application requirements, including networking, storage, computing, automotive and consumer applications. Memory Products: Memory packages consist of either standalone packaging and testing or a combination of NAND Flash, DRAM, or a memory controller IC using a variety of packaging technologies, including FC, SCSP, SiP, PoP and other state-of-the-art packaging technologies. These products are used as system memory or platform data storage in all of the company’s end markets. Wafer-level Package Products: The company offers three types of wafer-level packages: wafer-level CSP; WLFO; and SWIFT. Wafer-level CSP and WLFO are complementary technologies. Customers can choose between the two package types as their die sizes shrink or grow. Wafer-level CSP packages (also known as fan-in wafer-level packages) do not utilize a package carrier. The bumped wafer is singulated into individual die, and the wafer-level package is then attached directly to the system board. Wafer-level CSP offers one of the lowest total system costs, enabling higher semiconductor content while leveraging the smallest form factor and one of the highest performing, most reliable semiconductor package platforms on the market. Applications for wafer-level CSP include power management, transceivers, sensors, wireless charging, codecs, and specialty silicon for new or unique functionality. WLFO packages (also known as low-density fan-out packages) are utilized for ICs where the die surface area is too small to accommodate all of the required bond pads. The fan-out package enlarges the bondable surface area by building a border around the die using molding compound. These packages can include multiple die. Applications for WLFO packages include power management, transceivers, radar and specialty silicon. SWIFT, also known as high-density fan-out, can either replace the laminate substrate with a thinner structure or reduce the complexity of the substrate by housing the dense interconnects in the SWIFT structure, allowing for a less expensive substrate that provides a high level of performance with a structure. SWIFT solutions enable high performance in a compact form factor that combines tiled processors, memory, I/O (input/output) die and other peripheral ICs. Mainstream Products The company’s Mainstream Products use wirebond interconnect technology to connect a die to a leadframe or substrate package carrier and include leadframe packages, substrate-based wirebond packages and micro-electro-mechanical systems (MEMS) packages. Leadframe Packages: Leadframe packages use wirebond or flip chip technology to connect a die to a leadframe package carrier. Leadframe packages are used in many electronic devices and remain the most practical and cost-effective solution for many low to medium pin count analog and mixed signal applications. Traditional leadframe packages support a wide variety of device types and applications. Two of the company’s most popular traditional leadframe package types are small outline integrated circuit and quad flat package, commonly known as dual and quad products, respectively, based upon the number of sides from which the leads extend. The traditional leadframe package family has evolved from through hole design, where the leads are plugged into holes on the circuit board to surface mount design, where the leads are soldered to the surface of the circuit board. The company offers a wide range of lead counts and body sizes to satisfy variations in the size of customers’ semiconductor devices. Through a process of continuous engineering and customization, the company has designed several leadframe package types that are thinner and smaller than traditional leadframe packages and can accommodate more leads on the perimeter of the package. These leadframe packages typically have superior thermal and electrical characteristics, which allow them to dissipate heat generated by high-powered semiconductor devices while providing enhanced electrical connectivity. The company is developing increasingly smaller versions of these packages to keep pace with continually shrinking semiconductor device sizes and demand for miniaturization of portable electronic products. One of the company’s more successful leadframe package offerings is the MicroLeadFrame family of quad flat no lead packages. These packages offer miniaturized solutions for multiple analog power and signal chain applications. Power discrete devices use a leadframe as the package carrier and primarily use wirebond interconnect technology. Substrate-based Wirebond Packages: Substrate-based wirebond packages use wirebond technology to connect a die to a substrate. Some of the company’s packages in this category include stacked CSP, wirebond ball grid array packages and plastic ball grid array (PBGA) packages. Stacked CSP technology enables the stacking of a wide range of different semiconductor devices to deliver high levels of silicon integration and area efficiency. Stacked CSP utilizes high density thin core substrates and advanced materials, along with leading-edge wafer thinning, die attach and molding capabilities, to stack multiple die on a substrate. Stacked CSP is ideal for memory and mixed signal applications. Wirebond ball grid array packages offer a broad selection of ball array pitches, ball counts and body sizes, single and multi-die layouts, stacked die and passive component integration together with thermal management solutions. They are applicable for a wide range of semiconductors requiring a smaller package size than conventional PBGAs or leadframe packages. PBGA packages are used in applications requiring higher pin count than leadframe packages, but typically have lower pin counts than flip chip. PBGA packages are designed for low inductance, improved thermal operation and enhanced surface-mount technology ability. Custom performance enhancements, like ground and power planes, are also available. Micro-Electro-Mechanical Systems Packages: MEMS are miniaturized mechanical and electro-mechanical devices that can sense and provide information about the physical world and sometimes trigger a response. Examples of MEMS devices include microphones, accelerometers, airbag deployment sensors, gyrometers, magnetometers and humidity, temperature and pressure sensors. The company also specializes in sensor fusion products, which utilizes its cavity MEMS platform and combine multiple sensors into a single package. MEMS packages leverage the company’s expertise in wafer thinning, die stacking, wirebonding and flip chip interconnect to deliver sophisticated products with a very small form factor. Advanced System-in-Package Modules Advanced SiP modules combine multiple semiconductor and other electronic components with different functionalities into a single package. These modules use wirebond, flip chip or wafer-level interconnect technologies. Components can include ICs, passive devices (inductors, capacitors, resistors, filters and diplexers), antennas and mechanical parts. Advanced SiP modules are used for many applications such as radio frequency (RF) and front-end modules, basebands, connectivity, fingerprint sensors, display and touch screen drivers, sensors and MEMS, NAND memory and solid state drives. Advanced SiP modules are found in many products, including smartphones and tablets, automobiles, IoT wearables, high-performance gaming systems, computers and network systems. Test Services The company’s Test Services complement its wafer and packaging services across its Advanced and Mainstream Products. The company’s test services offer customers the cycle time and cost advantages of co-located turn-key services. Its test services are used as both an interim step or as the final testing step to ensure screening and rejection of defects, performance grading and overall outgoing quality and reliability. Wafer Level Test: Wafer level test is a manufacturing step performed while a wafer is still in its full form and before being singulated for further package processing. Package Level Test: Package level test is performed on a product or products that have been assembled in a package. Burn-In Test: Burn-in test is a process in which components of a system are exercised, monitored and measured in extreme operational conditions, such as high temperature, voltage and frequency over time. The purpose of the environmental and operational stress conditions of burn-in testing is to accelerate and screen early life failures and estimate and monitor long-term degradation and ultimate lifetime. System Level Test: System level test identifies defective SiP products that may not otherwise be screened by traditional wafer level, package level or burn-in testing. As advanced packaging proliferates and the integration of more individual components into a SiP grows, system level testing becomes more important. Test Development Services: Prior to mass production, an integrated manufacturing ready test solution must be developed and deployed. Amkor’s test development services offer both co-development and full development of complete test software and hardware solutions to the company’s customers. These services also enable early engagement with its customers in the product design phases for maximum compatibility with manufacturing. The company’s test development teams are experienced in a full suite of test engineering disciplines for Memory, Power, RF, Mixed Signal, Analog and digital test solution development. Research and Development In 2023, the company incurred $177.5 million of research and development expense. Sales and Marketing The company’s sales offices are located throughout Asia, Europe and the United States. The company’s support personnel manage and promote its packaging and test services and provide key customer and technical support. To provide comprehensive sales and customer service, the company typically assigns its customers a direct support team consisting of an account manager, technical program manager, test program manager and both field and factory customer support representatives. The company also supports its largest multinational customers from multiple office locations to ensure that it is aligned with their global operational and business requirements. Seasonality The company’s sales have generally been higher in the second half of the year than in the first half due to consumer buying patterns in the U.S., Europe and Asia and the timing of flagship mobile device launches. In addition, semiconductor companies generally reduce their production during the holidays at the end of December, which generally results in a decrease in packaging and test services during the first quarter (year ended December 31, 2023). Customers The company’s customers include many of the largest semiconductor companies in the world. The company’s ten largest customers accounted for 69% of its net sales in 2023. Direct sales to Apple Inc. accounted for 27.7% of the company’s net sales for the year ended December 31, 2023. Governmental Regulations The company is also committed to responsible environmental practices that go beyond legal requirements in conducting its business. These environmental practices include: Certification of the company’s factories worldwide to International Organization for Standards (ISO) framework 14001, widely recognized as the standard for effective environmental management systems. Measurement and independent verification of greenhouse gases (GHGs) generated by its factories worldwide. Once collected, its GHG data is submitted to, and disclosed publicly by, CDP, formerly known as the Carbon Disclosure Project. CDP is a leading organization that assesses the impact of climate change and promotes a sustainable economy. Membership in the Responsible Business Alliance (RBA), an international industry group dedicated to corporate social responsibility. RBA members agree to follow a uniform Code of Conduct that includes standards of environmental responsibility, and its factories have been subject to independent audits to assess compliance with these standards. Capital investment and process optimization activities to reduce GHGs include installation of solar photovoltaic panels, replacement of, or improvements to, chiller unit systems and use of light-emitting diode (LED) technology. Competition The company faces substantial competition from established packaging and test service providers primarily located in Asia, including companies with significant manufacturing capacity, financial resources, research and development operations, marketing and other capabilities. These companies include ASE Technology Holding Co., Ltd. and JCET Group Co., Ltd. In addition, the company competes with electronic manufacturing service providers or contract electronics manufacturers, including Universal Scientific Industrial (Shanghai) Co., Ltd. The company competes with contract foundries, such as Taiwan Semiconductor Manufacturing Company Limited, which offer full turnkey services from silicon wafer fabrication through packaging and final test. Intellectual Property The company has filed and obtained a number of patents in the U.S. and other countries, and their durations vary depending on the jurisdiction in which each patent is filed. Amkor, Amkor Technology, MicroLeadFrame, and SWIFT, among others, are trademarks of the company. History Amkor Technology, Inc. was founded in 1968. The company was incorporated in 1997.

Country
Industry:
Semiconductors and related devices
Founded:
1968
IPO Date:
05/01/1998
ISIN Number:
I_US0316521006
Address:
2045 East Innovation Circle, Tempe, Arizona, 85284, United States
Phone Number
480 821 5000

Key Executives

CEO:
Rutten, Giel
CFO
Faust, Megan
COO:
Data Unavailable